Xilinx Delivers Revolutionary CPLD Solution With CoolRunner-II Family

New RealDigital(TM) CPLDs Provide Unprecedented Performance And Ultra Low-Power Without Compromise

SAN JOSE, CA--(INTERNET WIRE)--Jan 14, 2002 -- Xilinx, Inc. (NASDAQ:XLNX) today announced the immediate availability of CoolRunner(R)-II RealDigital CPLDs, a new class of CPLDs with an all-digital core. Offering the best combination of high performance and ultra low-power without compromise, CoolRunner-II CPLDs are cost optimized to address the increasing demands of today's system designer. Available in densities ranging from 32 to 512 macrocells, the CoolRunner-II family achieves performance up to 300 MHz and pin-to-pin delays as fast as 3.5ns while providing a standby current of less than 100 micro amp ( < 100mA ) - an industry first. Additional information is available at www.xilinx.com/coolrunner2.

Source: Xilinx, Inc.
(click to enlarge) Xilinx CoolRunner-II CPLDs Lowest Power, High Performance CP

The CoolRunner-II second generation Fast Zero Power(TM) (FZP) design technology creates a new class of CPLD that utilizes a 0.18 micron process and 1.8V core voltage to provide both high performance and ultra low-power consumption in a single device. Using the proven FZP all-digital core, CoolRunner-II devices replace the traditional power-hungry sense amplifier technology, which has been the architecture approach for competing CPLD devices until now. The all-digital core designed with FZP process technology is the foundation for how CoolRunner-II CPLDs can combine the advantages of high performance while maintaining their ultra low-power consumption. The long-term advantage of this fully digital design is a scalable process that will allow continued geometry shrinks for future cost optimization, greater density and performance, and lower power consumption, far surpassing all competitive devices.

"Until now CPLD suppliers had to sacrifice low-power to achieve high performance," said Doug DeVries, vice president of hardware development at HandEra, a leading provider of handheld computing devices. "CoolRunner-II will be the first product in the market to solve this dichotomy and to do it without a price premium."

Advanced System Features

Designers of today's digital products continue to demand higher performance and greater functional integration from their semiconductor components. CoolRunner-II CPLDs meet these demands by providing advanced system features including advanced programmable I/O capabilities, superior clock management, unparalleled design security, and a wide variety of packaging options.

The CoolRunner-II advanced I/O interface capability fully addresses all aspects of system connectivity in both low-power consumer product applications and leading edge telecommunications and networking equipment. The advanced I/O solution consists of both the physical interface and the protocols to maximize system interface bandwidth.

CoolRunner-II CPLDs provide unsurpassed clock management features that enable an easy to implement total clock management solution. CoolCLOCK(TM) clock management is a combination clock divider and clock doubler that divides the incoming clock by two and then doubles the clock at the output level to maintain the same performance while reducing the internal power consumption.

Due to the vast number of applications in today's electronic markets, the need for design security has never been greater. System designers need the ability to protect their design codes from very aggressive competitors. The CoolRunner-II family provides an unprecedented four levels of design security buried within the layers of the device and scattered throughout the die to make their detection virtually impossible.

The CoolRunner-II family boasts a wide range of packaging options to support a variety of applications. Designers can choose between packages ranging from small foot print chip scale packages for portable and space limited applications, to surface mount packages for cost sensitive applications, and up to 324-pin BGA packages for high performance applications.

World Class Software Support

The CoolRunner-II family is fully supported by Xilinx free ISE WebPACK(TM) and WebFITTER(TM) internet based design software. With Xilinx WebPACK software designers get a no cost fully functional, downloadable desktop solution with HDL and ABEL synthesis and simulation capability. Xilinx WebFITTER internet based design software gives designers free CPLD design fitting tools to evaluate designs using CoolRunner-II and all Xilinx CPLD families. In addition to free web-based software, Xilinx offers the 4.1i Integrated Software Environment (ISE) software tool series. ISE 4.1i is the industry's most advanced programmable logic development system, including ProActive Timing Closure technology and integration with some of the most powerful EDA tools for advanced logic design.

Pricing and Availability

Initial production of the XC2C64 (64 macrocell) device began prior to introduction and is immediately available, with the five other device densities becoming available over the next two quarters. Second half 2002 pricing for the XC2C64-VQ44 device is as low as $1.90 in volumes greater than 100,000 units.

About Xilinx

Xilinx is the leading supplier of complete programmable logic solutions, including advanced integrated circuits, software design tools, predefined system functions delivered as intellectual property cores, and unparalleled field engineering support. Founded in 1984 and headquartered in San Jose, Calif., Xilinx invented the field programmable gate array (FPGA) and fulfills more than half of the world demand for these devices today. Xilinx solutions enable customers to reduce significantly the time required to develop products for the computer, peripheral, telecommunications, networking, industrial control, instrumentation, aerospace, defense, low-power portable and consumer markets. For more information, visit the Xilinx web site at www.xilinx.com.